Prof. Dr.-Ing. Axel Sikora, Dipl.-Ing. Dipl. Wirt.-Ing.
Offenburg University of Applied Sciences, Scientific Director, Institute Reliable Embedded Systems and Communication Electronics (ivESK)
Hahn-Schickard Association of Applied Research, Deputy Executive Board, Head of Division "Software Solutions"
Low-Power Wire-Area (LPWAN) Networks and Narrowband-IoT (NB-IoT) technologies combine low-power and low-energy operation of wireless systems with low data-rate and bandwidth. They enable excellent receiver sensitivities of as low as -150 to -160dBm to achieve link budgets of 160 to 170dB with output power of as low as 10dBm. Thus, they reach distances of several (typically around 10) kilometers. They are also very economic both in device cost (investment cost) and in complexity of network management (operational cost). Combining these features, they enable a new class of applications for the Internet of Things (IoT), which require simple, long-range, low-energy for battery powered or energy-autarkic operation. The keynote will give an overview over the available and future technologies, explain their technical background, allow an insight into the implementations and tests from the author's team and present measurement results. Also, it will describe the impact of these technologies for wireless applications.
Axel Sikora holds a diploma of Electrical Engineering (Dipl.-Ing./M.Sc., 1993) and a diploma of Business Administration (Dipl. Wirt.-Ing., MBA, 1995), both from Aachen Technical University. He has done a Ph.D. in Electrical Engineering at the Fraunhofer Institute of Microelectronics Circuits and Systems, Duisburg, with a thesis on SOI-technologies in 1996. After various positions in the telecommunications and semiconductor industry, he became a professor at the Baden-Wuerttemberg Cooperative State University Loerrach in 1999. In 2011, he joined Offenburg University of Applied Sciences, where he leads the Institute of Reliable Embedded Systems and Communication Electronics (ivESK). Since 2016, he is also deputy member of the board and head of the "Software Solutions" division at Hahn-Schickard Association of Applied Research (Germany), one of the leading institute around Cyber-Physical Systems (CPS) for Industry 4.0 applications in Germany. In 2002, he also founded the Steinbeis Transfer Center Embedded Design and Networking, which was successfully spun off as STACKFORCE GmbH in 2014. His major interest is in the system development of efficient, energy-aware, autonomous, secure, and value-added algorithms and protocols for wired and wireless embedded communication. His teams have executed the reference implementation of the LoRaWAN-stack of LoRa Alliance, a SIGFOX implementation for one of the big semiconductor manufacturers, and is working in several NB-IoT related projects. Dr. Sikora is author, co-author, editor and co-editor of several textbooks and more than one two hundred peer-reviewed papers in the field of embedded design and wireless and wired networking. Amongst many other duties, he serves as Chairman of the annual Embedded World Conference, the world's largest event on this topic, and as Symposium Co-Chairmen to the 4th IEEE Intternational Symposium on Wireless Systems within the IEEE Internationl Conferences on Intelligent Data Acquisition and Advanced Computing Systems.
Prof. Dr. rer. nat., The Institute for Communication Technologies and Embedded Systems,
RWTH Aachen University, Aachen, Germany
Virtually all digital IC platforms today are based on flexible programmable processor cores, with a trend towards Multi/Manycore architectures comprising 10-100 cores. This trend is imposed by high performance and power/energy efficiency demands. Specifically in competitive embedded application domains like smartphones, wireless infrastructure, and automotive, there are tight efficiency constraints on power, energy, timing, design cost, and production cost of the underlying HW platforms. The need for flexibility and efficiency leads to heterogeneous platform architectures, composed of off-the-shelf (yet partially customizable) IP cores, like RISCs, and custom application-specific processors, such as DSP or security accelerators. Moreover, these cores communicate over complex on-chip interconnect and memory subsystem architectures. These trends impose huge challenges for ICT system and semiconductor industry. Novel design methodologies and tools are required for managing the skyrocketing HW platform design complexity, while simultaneously optimizing systems and components for performance, power, and costs. Furthermore, migrating legacy application code or firmware as well as developing and debugging new software for highly parallel HW platforms causes a significant embedded SW productivity gap. This talk presents various advanced system-level design methodologies in a practice-oriented way and also provides an outlook on upcoming HW security issues.
Rainer Leupers received the M.Sc. (Dipl.-Inform.) and Ph.D. (Dr. rer. nat.) degrees in Computer Science with honors from TU Dortmund in 1992 and 1997. From 1997-2001 he was the chief engineer at the Embedded Systems chair at TU Dortmund. In 2002, he joined RWTH Aachen University as a professor for Software for Systems on Silicon. His research comprises software development tools, processor architectures, and system-level electronic design automation, with focus on application-specific multicore systems. He published numerous books and technical papers and served in committees of the leading international EDA conferences. He received various scientific awards, including Best Paper Awards at DAC and twice at DATE, as well as several industrial awards. Dr. Leupers is also engaged as an entrepreneur and in turning novel technologies into innovations. He holds several patents on system-on-chip design technologies and has been a co-founder of LISATek (now with Synopsys), Silexica, and Secure Elements. He has served as consultant for various companies, as an expert for the European Commission, and in the management boards of large-scale projects like HiPEAC and UMIC. He is the coordinator of EU projects TETRACOM and TETRAMAX on academia/industry technology transfer.
Late Paper Submission:
22 July 2018
10 May 2018
24 May 2018
24 July 2018
21 August 2018
25 August 2018
05 September 2018